Google Unveils TPU 8tx and 8i Max for Agent Workloads

Google's chip announcement this week is really two announcements wearing one headline. The company introduced two new eighth-generation TPU systems, the TPU 8tx and the TPU 8i Max, and then spent most of its detail on the software around them: an open-sourced memory library, an open serving engine and orchestration tools moving to general availability. The silicon is the ticket. The stack is the product.

The 8tx is built for customers who can't let data sit unprotected. It pairs TPU 8t silicon with custom AMD CPU hosts and Google's low-latency Boardfly network to provide hardware-level confidential computing, keeping sensitive data and model weights isolated in memory while in active use. Google claims up to 2x lower latency than the TPU 8t with a near-zero performance penalty, and says a single system can run inference, fine-tune on private data, distill large models into smaller ones and train agents through reinforcement learning without migrating sensitive data between clusters. That's a regulated-industry checklist, written in hardware.

The 8i Max attacks the opposite bottleneck: memory bandwidth. It combines two low-latency TPU 8i chips onto a single package inside the existing rack footprint, delivering double the compute, double the SRAM and double the HBM bandwidth of the 8i. The target workload is multi-agent systems reasoning across massive software codebases or hours of video, jobs that stall when the memory system can't feed the processors. Doubling bandwidth inside the same rack is a data center economics argument as much as a performance one.

The software may outlast the chips. Google open-sourced TPU Sync, a C++ library that unifies TPU memory, host memory, shared storage and the network into a single hierarchy, and says it cuts key-value transfer latency by more than 90 percent and reduces time to first token by an average of 90 percent on heavyweight open-weight mixture-of-experts models of 235 billion to 480 billion parameters. It also introduced an open-source TPU agent suite, in preview, that plugs into Claude Code, Cursor and Google Antigravity, and an XLA Serving Engine that serves models trained in Python from a low-latency C++ runtime across TPUs, GPUs and CPUs.

Two production systems reached general availability in the same announcement. Cloud Pathways, built by Google DeepMind to train and serve Gemini and used for more than 130 million Cloud TPU chip-hours on Google Kubernetes Engine in the last 90 days, is now generally available on GKE, letting one client orchestrate TPU slices spanning thousands of chips as if they were connected locally. GKE dynamic slicing, which stitches or partitions TPU cubes on demand, is also generally available, with Google claiming job startup times up to 5x faster and fault recovery up to 4.5x faster.

The commercial context is expansion. Google moved earlier this month to sell its custom chips to external customers beyond its own cloud, and reporting on the expansion puts its TPU customer count near 100, with Oracle planning to offer the chips through its cloud platform next year. Every one of those customers is a buyer Nvidia doesn't get. Google's answer to the GPU incumbent isn't a single faster accelerator; it's a full, increasingly open stack that makes leaving it more expensive than staying.